1. Technical Field
The present invention relates to a test apparatus, a test method, and a system for testing a device under test.
2. Related Art
A test apparatus for testing a semiconductor apparatus or the like includes a plurality of test modules and a control apparatus. Each test module exchanges a signal with a device under test. The test apparatus is connected to each test module via a bus such as a PCI. Such a test apparatus can change the connection state between the control apparatus and the plurality of test modules.
In the test apparatus, when the connection state between the control apparatus and the plurality of test modules has been changed, the control apparatus performs initialization so as to access each test module. More specifically, the control apparatus reads information from the configuration register of each test module, to assign, in order, the storage regions of the test modules to addresses on an address space of the bus. The control apparatus then writes entry values of the addresses to which the test modules are assigned, to the configuration registers of the test modules respectively. The initialization of the control apparatus can complete in this way.
Such test apparatuses have to perform read and write operations to the respective configuration registers of the plurality of test modules in the initialization. This makes the initialization of such test apparatuses cumbersome.
Moreover in a case where a broadcast command attempting to access all of the plurality of test modules is provided, the control apparatus has to determine the test module that is assigned the address range corresponding to the address designated by the command. However, the control apparatus of such a test apparatus conventionally does not manage the address range assigned to each test module, which makes it difficult to deal with a broadcast command.